Sub-threshold Circuit Design Techniques for Ultra Low-Power Logic
نویسندگان
چکیده
With CMOS technology being scaled to ever smaller dimensions to achieve higher performance and integration levels, power dissipation has become a major concern in modern VLSI designs. Sub-threshold circuits have gained a lot of importance due to ultra low-power consumption. The paper reviews the sub-threshold circuit design. Various body-biasing schemes and logic families for performance enhancement in sub-threshold regime are identified. The paper analyzes interconnects for very large scale integration (VLSI) applications and identifies carbon nano-tube interconnects as future technology for sub-threshold operation.
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تاریخ انتشار 2011